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A.D.PATEL INSTITUTE OF TECHNOLOGY

(The Charutar Vidya Mandal (CVM) University)
GSIRE An ISO 9001:2015 Certified Institute

Demonstration of the Synopsys Tool

πŸ“… 06 Sep 2025 – 06 Sep 2025   |   πŸ“ CAD Lab

Electronics & Communication Institute Level Workshop Completed

Demonstration of the Synopsys Tool Poster
About Event

On 6th September 2025, the IEEE student branch, ADIT successfully organized a hands-on technical workshop on "Demonstration of Synopsys Tool for Semiconductor & Chip Design." The event was designed to provide participants with practical exposure to industry-standard Electronic Design Automation (EDA) tools. The workshop featured an in depth walkthrough of the VLSI design flow, from RTL to GDSII, using Synopsys tools. It was met with enthusiastic participation from students, effectively bridging


Objectives of the Event
  • To introduce participants to the end-to-end VLSI design flow used in the industry.
  • To provide a live, hands-on demonstration of Synopsys EDA tools for simulation and
  • synthesis.

Committee Details

Coordinator

Dr. Hetal patel

Professor

ec.hetal.patel@adit.ac.in

Co-coordinator

Dr. Dinesh Gupta

Assistant Professor

ec.dinesh.gupta@adit.ac.in

Event Outcomes

  • The "Demonstration of Synopsys Tool" workshop was a resounding success. It effectively achieved its goal of providing valuable insights into the professional world of semiconductor design.
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